1. Field of the Invention
This invention relates to computer systems. In particular, the invention relates to updating a timer from multiple timing domains.
2. Description of Related Art
Timing circuits are important in many communication systems. In particular, communication networks usually require accurate timing references for data transmission. High speed serial data transmissions are becoming popular due to communication efficiency, ease of interfacing, and availability of well defined protocols and standards.
The Institute of Electrical and Electronics Engineers (IEEE) 1394 is a video-speed serial interconnect that makes the convergence of consumer electronics and personal computers (PCs) possible. Products supporting 1394 protocols at 100 to 400 Megabits/sec (Mbps) are now commercially available. Products with speeds up to 3200 Mbps will be available in a near future.
To promote product development and enhance industry cooperation, the Open Host Controller Interface (OHCI) specification defines basic protocols and operational modes to support the IEEE 1394 standard and its enhancements (e.g., 1394a). There are basically two main types of data transfers in the 1394 protocol: asynchronous and isochronous. An asynchronous is a type of data transfer that guarantees delivery of data, but not necessarily the delivery time. On the other hand, the isochronous transfer is a type of data transfer that guarantees timing because late data would be useless. Examples of isochronous transfer include video and voice data where real-time data transfer is important.
An isochronous transfer requires accurate timing information to guarantee delivery time. An OHCI-compliant device should also be able to provide timing data from a number of sources. However, due to mismatch in clock frequency, delays, and types of transfer, maintaining a timer device that can operate from multiple timing domains is a difficult problem.
One solution to this problem is to use shadow register(s). A shadow register is essentially a copy of the timer register that aliases into the timer address. A timer update can be performed on the shadow register. The content of the shadow register will be transferred to the timer register when necessary. However, the use of shadow registers has many disadvantages. One disadvantage is the additional storage required for implementing the shadow registers, especially when there are many timing domains. Another disadvantage is that timing synchronization is still to be performed by external circuitry. In addition, arbitration of multiple timing updates is difficult.
Therefore, there is a need in the technology to provide an efficient technique to update a timer from multiple timing domains.